LECTRONICS >:F

[tgies]

Attention engineering people

I am (in my head anyway this is a theoretical design) using a serial-in, parallel-out shift register (SHIFT REGISTERS :D) as a sequencer to trigger drums. 16 bits. Four clocks of the shift register equals one beat in musical time, so it's being clocked fairly slow.

The problem, then, is: how do I initially write in my one bit which loops through the shift register to set off one output at a time? One way I can think of is to use a Schmitt trigger to pulse the in on the shift register just long enough for the first clock, but the thing about that is that I want the tempo to be adjustable from one potentiometer, and how would I make that first pulse shorten to match the clock rate? I could obviously run them off of the same (ganged) pot, but the thing is I'm not sure if they have the same Curve and aug

how would you do it

Comments

[korgmeister.livejournal.com]

I'd personally fuck the shift register right off and do this on a microcontroller*, but I'm pretty sure you're looking for a more elegant and hardware-based solution than that.

So I'd either use a 555 timer, a non-retriggerable monostable multivibrator or (most likely) both, depending on what exactly I wanted to do.

*But I'm an embedded guy, so I imagine you were expecting me to say that.

[tgies.livejournal.com]

Seems like a waste of a microcontroller, considering that all I want to do is exactly what a shift register or decade counter does, so I think that'd kind of overcomplicate the design. Plus I'd have to use sixteen whole IO pins to strobe the switch matrix anyway.

555 timer seems like overkill (and would still bring us back to the same question). Multivibrator one-shot is, in fact, basically the same thing as the Schmitt trigger array I'm presently using, so the same question still remains.

I'm thinking I can probably limit my tempo adjust to a "reasonable" range for which I can find a value for the width of the Schmitt trigger's pulse which works fine for all tempos. I guess I'm going to try that.

[korgmeister.livejournal.com]

I think the lesson we've learned here is "don't ask Korgmeister how to build hardware because his approach is basically varying degrees of overkill".

Admittedly, my tendency to do so has something to do with the fact that I can just go to the hardware room in my TAFE and ask for damn near any sort of IC or basic component (within reason) provided I can give a convincing enough explanation.

To say nothing of how many components my kleptomaniac classmate accumulates.

[redlof.livejournal.com]

Let me get this straight. You've got a 16 bit shift register and you want to store 1000000000000000 in it and then you want it to ring around? I'd probably make a flip flop or something that stays high until there's a 1 on the first parallel out bit and then or the output of that with the last parallel out bit.

Or did I completely misunderstand what you were saying?

P.S. Flip flops again? People are going to start thinking that's the only part of electronics I know about.

[tgies.livejournal.com]

No, that's not the problem. I can just hook up the least significant bit to data in and it gets shifted off the end and right in the input again. Simple.

The problem is getting that one bit written into the shift register in the first place. I basically have to deliver a single controlled pulse to serial in for as long as it takes the first clock of the shift register to rise, and no longer.

[darius.livejournal.com]

I have not built any hardware since digital electronics class, but: NOR all the parallel outs together and OR that into your shift-in?

[(Anonymous)]

Like I told the guy above you, that's not the problem. I just have the rightmost out hooked right up to the shift-in and it works fine. The problem is delivering one single pulse to the shift register, and only one, for the time it takes for the first clock pulse to rise.

[tgies.livejournal.com]

What the hell livejournal you piece of crap I was logged in.

[darius.livejournal.com]

I know you want to initialize the thing. I just had this doubtless-retarded mental model where you can be sure the state is all 0 at startup. Perhaps this digital-logic approach still works without that assumption: you OR in a signal that's 0 if and only if exactly one of the parallel outputs is 1. But that'd need fancier logic: effectively a 2-bit-wide adder over 16 inputs.

[darius.livejournal.com]

And the input to the shift register is no longer just an OR of those two inputs, sigh.

[korgmeister.livejournal.com]

XNOR, bitches!

(But then, I don't even want to think about how difficult it would be to get a 16-input XNOR)

[tgies.livejournal.com]

oh maybe I should have actually read your comment

that actually kind of makes sense. hmm

[darius.livejournal.com]

I was just thinking about this while they were pounding in new window frames and it was impossible to work. I would make the input to the shift register be the NOR of the first 15 outputs, and just ignore the last output. Funny how this is the exact opposite of the feedback hookup you'd normally use (putting the last output back into the input) -- I wonder if something like this kind of duality comes up in other self-stabilization problems.